Twenty-five years of technical leadership across a wide range of technologies with a strong emphasis on driving innovative computing architectures and platforms in both industrial and academic environments. Versatile background including leadership, computer architecture and full-cycle product design. Experience ranging from academic and industrial research to pre-IPO startups to world-class, Fortune 500 corporations.

Significant Leadership and Technical Experience

Developed architectures and micro-architectures for multiple high performance systems including high-end, multi-core GPUs, multi-processor ccNUMA systems, high-end processor designs; mobile devices, image processing pipelines, computer vision, wafer-scale systolic arrays, and multiprocessor performance data acquisition logic. Strong focus on system-on-a-chip (SOC) architectures, network-on-chip (NoC) architectures, cache hierarchies, cache coherence protocols, and front-end memory controllers.

Built multiple research and development teams with strong focus on culture and collaborative accomplishment. Coordinated and provided leadership for several cross-functional and informal teams. Involved in many aspects of strategic product development including customer engagement, market analysis and product requirement definitions. Drove future roadmaps for several efforts. Developed IP strategic plan to maximize patent protection.

Design and Modeling
Significant design experience ranging from system prototyping to logic design and verification. Strong chip design experience including micro-architecture, RTL development, logic verification and behavioral modeling. Experience with high-end FPGAs, ASIC and custom logic design for high-performance computing, computer graphics, image processing, radar anti-jamming, networking, and security systems. Developed and brought-up several system prototypes to demonstrate and analyzed system behavior and performance. Developed modeling environments for system, protocol and micro-architecture performance analysis and utilized environments for detailed analysis of latency, throughput, resource sizing, algorithms, etc. Several projects required extensive software development: driver stacks, system software, simulators, user interfaces, data acquisition and display.
David Glasco, Ph.D.
Copyright 2014 David Glasco
Austin, TX 78726